A Novel Design of Low-Power 1-Bit CMOS Full-Adder Cell using XNOR and MUX
نویسندگان
چکیده
منابع مشابه
a low-power and low-energy 1-bit full adder cell using 32nm cnfet technology node
full adder cell is often placed in the critical path of other circuits. therefore it plays an important role in determining the entire performance of digital system. moreover, portable electronic systems rely on battery and low-power design is another concern. in conclusion it is a vital task to design high-performance and low-power full adder cells. since delay opposes against power consumptio...
متن کاملA Novel Low-Power Low-Voltage CMOS 1-Bit Full Adder Cell with the GDI Technique
The power-delay product is a direct measurement of the energy expanded per operational cycle of an arithmetic circuit. Lowering the supply voltage of the full adder cell to achieve low power-delay product is a sensible approach to improve the power efficiency at sustainable speed of arithmetic circuits composed of such instances at high level design. In this paper, a novel design of a low power...
متن کاملA Novel CMOS 1-bit 8T Full Adder Cell
The 1-bit full adder is a very important component in the design of application specific integrated circuits. Demands for the low power VLSI have been pushing the development of design methodologies aggressively to reduce the power consumption drastically. In most of the digital systems adder lies in the critical path that affects the overall speed of the system. So enhancing the performance of...
متن کاملA Novel High-Performance CMOS 1-Bit Full-Adder Cell
In this paper we introduced low leakage 10T one-bit full adders cells are proposed for mobile applications. The analysis has been performed on various process and circuits techniques, the analysis with leakage power. We introduced a new transistor resizing approach for 1bit full adder cells to determine the optimal sleep transistor size which reduce the leakage power and area to minimize leakag...
متن کاملUltra Low Power 1-Bit Full Adder
In this paper we propose a new 9 transistor 1-bit full adder. The proposed circuit performs efficiently in subthreshold region to employ in ultra low power applications. The main design objective for this new circuit is low power consumption and full voltage swing at a low supply voltage. The proposed cell also remarkably improves the power consumption, power delay product and has better noise ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: INTERNATIONAL JOURNAL OF MANAGEMENT & INFORMATION TECHNOLOGY
سال: 2013
ISSN: 2278-5612
DOI: 10.24297/ijmit.v7i3.702